Electrical Overstress Electrostatic Discharge Symposium Proceedings
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Electrical Overstress (EOS)
| Author | : Steven H. Voldman |
| Publisher | : John Wiley & Sons |
| Total Pages | : 368 |
| Release | : 2013-08-27 |
| Genre | : Technology & Engineering |
| ISBN | : 1118703332 |
Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This bookteaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today’s modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today’s semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author’s series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era.
ESD
| Author | : Steven H. Voldman |
| Publisher | : John Wiley & Sons |
| Total Pages | : 565 |
| Release | : 2015-04-24 |
| Genre | : Technology & Engineering |
| ISBN | : 1118954483 |
ESD: Circuits and Devices 2nd Edition provides a clear picture of layout and design of digital, analog, radio frequency (RF) and power applications for protection from electrostatic discharge (ESD), electrical overstress (EOS), and latchup phenomena from a generalist perspective and design synthesis practices providing optimum solutions in advanced technologies. New features in the 2nd edition: Expanded treatment of ESD and analog design of passive devices of resistors, capacitors, inductors, and active devices of diodes, bipolar junction transistors, MOSFETs, and FINFETs. Increased focus on ESD power clamps for power rails for CMOS, Bipolar, and BiCMOS. Co-synthesizing of semiconductor chip architecture and floor planning with ESD design practices for analog, and mixed signal applications Illustrates the influence of analog design practices on ESD design circuitry, from integration, synthesis and layout, to symmetry, matching, inter-digitation, and common centroid techniques. Increased emphasis on system-level testing conforming to IEC 61000-4-2 and IEC 61000-4-5. Improved coverage of low-capacitance ESD, scaling of devices and oxide scaling challenges. ESD: Circuits and Devices 2nd Edition is an essential reference to ESD, circuit & semiconductor engineers and quality, reliability &analysis engineers. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, microelectronics and IC design.
Electrostatic Discharge Control Handbook for Protection of Electrical and Electronic Parts, Assemblies and Equipment (excluding Electrically Initiated Explosive Devices) (metric)
| Author | : United States. Department of Defense |
| Publisher | : |
| Total Pages | : 168 |
| Release | : 1991 |
| Genre | : Electric discharges |
| ISBN | : |
The ESD Handbook
| Author | : Steven H. Voldman |
| Publisher | : John Wiley & Sons |
| Total Pages | : 1172 |
| Release | : 2021-03-25 |
| Genre | : Technology & Engineering |
| ISBN | : 1119233135 |
A practical and comprehensive reference that explores Electrostatic Discharge (ESD) in semiconductor components and electronic systems The ESD Handbook offers a comprehensive reference that explores topics relevant to ESD design in semiconductor components and explores ESD in various systems. Electrostatic discharge is a common problem in the semiconductor environment and this reference fills a gap in the literature by discussing ESD protection. Written by a noted expert on the topic, the text offers a topic-by-topic reference that includes illustrative figures, discussions, and drawings. The handbook covers a wide-range of topics including ESD in manufacturing (garments, wrist straps, and shoes); ESD Testing; ESD device physics; ESD semiconductor process effects; ESD failure mechanisms; ESD circuits in different technologies (CMOS, Bipolar, etc.); ESD circuit types (Pin, Power, Pin-to-Pin, etc.); and much more. In addition, the text includes a glossary, index, tables, illustrations, and a variety of case studies. Contains a well-organized reference that provides a quick review on a range of ESD topics Fills the gap in the current literature by providing information from purely scientific and physical aspects to practical applications Offers information in clear and accessible terms Written by the accomplished author of the popular ESD book series Written for technicians, operators, engineers, circuit designers, and failure analysis engineers, The ESD Handbook contains an accessible reference to ESD design and ESD systems.
Electrostatic Discharge
| Author | : Steven Voldman |
| Publisher | : BoD – Books on Demand |
| Total Pages | : 104 |
| Release | : 2019-10-02 |
| Genre | : Science |
| ISBN | : 1789848962 |
As we enter the nanoelectronics era, electrostatic discharge (ESD) phenomena is an important issue for everything from micro-electronics to nanostructures. This book provides insight into the operation and design of micro-gaps and nanogenerators with chapters on low capacitance ESD design in advanced technologies, electrical breakdown in micro-gaps, nanogenerators from ESD, and theoretical prediction and optimization of triboelectric nanogenerators. The information contained herein will prove useful for for engineers and scientists that have an interest in ESD physics and design.
ESD Testing
| Author | : Steven H. Voldman |
| Publisher | : John Wiley & Sons |
| Total Pages | : 323 |
| Release | : 2016-12-19 |
| Genre | : Technology & Engineering |
| ISBN | : 0470511915 |
With the evolution of semiconductor technology and global diversification of the semiconductor business, testing of semiconductor devices to systems for electrostatic discharge (ESD) and electrical overstress (EOS) has increased in importance. ESD Testing: From Components to Systems updates the reader in the new tests, test models, and techniques in the characterization of semiconductor components for ESD, EOS, and latchup. Key features: Provides understanding and knowledge of ESD models and specifications including human body model (HBM), machine model (MM), charged device model (CDM), charged board model (CBM), cable discharge events (CDE), human metal model (HMM), IEC 61000-4-2 and IEC 61000-4-5. Discusses new testing methodologies such as transmission line pulse (TLP), to very fast transmission line pulse (VF-TLP), and future methods of long pulse TLP, to ultra-fast TLP (UF-TLP). Describes both conventional testing and new testing techniques for both chip and system level evaluation. Addresses EOS testing, electromagnetic compatibility (EMC) scanning, to current reconstruction methods. Discusses latchup characterization and testing methodologies for evaluation of semiconductor technology to product testing. ESD Testing: From Components to Systems is part of the authors’ series of books on electrostatic discharge (ESD) protection; this book will be an invaluable reference for the professional semiconductor chip and system-level ESD and EOS test engineer. Semiconductor device and process development, circuit designers, quality, reliability and failure analysis engineers will also find it an essential reference. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, semiconductor testing and experimental work.
Transient-Induced Latchup in CMOS Integrated Circuits
| Author | : Ming-Dou Ker |
| Publisher | : John Wiley & Sons |
| Total Pages | : 265 |
| Release | : 2009-07-23 |
| Genre | : Technology & Engineering |
| ISBN | : 0470824085 |
The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.
Mixed-Signal Circuits
| Author | : Thomas Noulis |
| Publisher | : CRC Press |
| Total Pages | : 420 |
| Release | : 2018-09-03 |
| Genre | : Technology & Engineering |
| ISBN | : 1482260638 |
Mixed-Signal Circuits offers a thoroughly modern treatment of integrated circuit design in the context of mixed-signal applications. Featuring chapters authored by leading experts from industry and academia, this book: Discusses signal integrity and large-scale simulation, verification, and testing Demonstrates advanced design techniques that enable digital circuits and sensitive analog circuits to coexist without any compromise Describes the process technology needed to address the performance challenges associated with developing complex mixed-signal circuits Deals with modeling topics, such as reliability, variability, and crosstalk, that define pre-silicon design methodology and trends, and are the focus of companies involved in wireless applications Develops methods to move analog into the digital domain quickly, minimizing and eliminating common trade-offs between performance, power consumption, simulation time, verification, size, and cost Details approaches for very low-power performances, high-speed interfaces, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), and biomedical filters Delineates the respective parts of a full system-on-chip (SoC), from the digital parts to the baseband blocks, radio frequency (RF) circuitries, electrostatic-discharge (ESD) structures, and built-in self-test (BIST) architectures Mixed-Signal Circuits explores exciting opportunities in wireless communications and beyond. The book is a must for anyone involved in mixed-signal circuit design for future technologies.
