Design Trade-offs for Reliable On-chip Wireless Interconnects in NoC Platforms

Design Trade-offs for Reliable On-chip Wireless Interconnects in NoC Platforms
Author: Manoj Prashanth Yuvaraj
Publisher:
Total Pages: 146
Release: 2014
Genre: Code division multiple access
ISBN:

"The massive levels of integration following Moore's Law making modern multi-core chips prevail in various domains ranging from scientific applications to bioinformatics applications for consumer electronics. With higher and higher number of cores on the same die traditional bus based interconnections are no longer a scalable communication infrastructure. On-chip networks were proposed enabled a scalable plug-and-play mechanism for interconnecting hundreds of cores on the same chip. Wired interconnects between the cores in a traditional Network-on-Chip (NoC) system, becomes a bottleneck with increase in the number of cores thereby increasing the latency and energy to transmit signals over them. Hence, there has been many alternative emerging interconnect technologies proposed, namely, 3D, photonic and multi-band RF interconnects. Although they provide better connectivity, higher speed and higher bandwidth compared to wired interconnects; they also face challenges with heat dissipation and manufacturing difficulties. On-chip wireless interconnects is one other alternative proposed which doesn't need physical interconnection layout as data travels over the wireless medium. They are integrated into a hybrid NOC architecture consisting of both wired and wireless links, which provides higher bandwidth, lower latency, lesser area overhead and reduced energy dissipation in communication. An efficient media access control (MAC) scheme is required to enhance the utilization of the available bandwidth. A token-passing protocol proposed to grant access of the wireless channel to competing transmitters. This limits the number of simultaneous users of the communication channel to one although multiple wireless hubs are deployed over the chip. In principle, a Frequency Division Multiple Access (FDMA) based medium access scheme would improve the utilization of the wireless resources. However, this requires design of multiple very precise, high frequency transceivers in non-overlapping frequency channels. Therefore, the scalability of this approach is limited by the state-of-the-art in transceiver design. The Code Division Multiple Access (CDMA) enables multiple transmitter-receiver pairs to send data over the wireless channel simultaneously. The CDMA protocol can significantly increase the performance of the system while lowering the energy dissipation in data transfer. The CDMA based MAC protocol outperforms the wired counterparts and several other wireless architectures proposed in literature in terms of bandwidth and packet energy dissipation. However, the reliability of CDMA based wireless NoC's is limited, as the probability of error is eminent due to synchronization delays at the receiver. The thesis proposes the use of an advanced filter which improves the performance and also reduces the error due to synchronization delays. This thesis also proposes investigation of various channel modulation schemes on token passing wireless NoC's to examine the performance and reliability of the system. The trade-off between performance and energy are established for the various conditions. The results are obtained using a modified cycle accurate simulator."--Abstract.

Proceedings of the International Conference on Paradigms of Communication, Computing and Data Sciences

Proceedings of the International Conference on Paradigms of Communication, Computing and Data Sciences
Author: Mohit Dua
Publisher: Springer Nature
Total Pages: 853
Release: 2022-01-01
Genre: Technology & Engineering
ISBN: 9811657475

This book gathers selected high-quality research papers presented at the International Conference on Paradigms of Communication, Computing and Data Sciences (PCCDS 2021), held at the National Institute of Technology, Kurukshetra, India, during May 07–09, 2021. It discusses high-quality and cutting-edge research in the areas of advanced computing, communications, and data science techniques. The book is a collection of latest research articles in computation algorithm, communication, and data sciences, intertwined with each other for efficiency.

Handbook of Energy-Aware and Green Computing - Two Volume Set

Handbook of Energy-Aware and Green Computing - Two Volume Set
Author: Ishfaq Ahmad
Publisher: CRC Press
Total Pages: 1284
Release: 2016-02-03
Genre: Computers
ISBN: 1482254441

Implementing energy-efficient CPUs and peripherals as well as reducing resource consumption have become emerging trends in computing. As computers increase in speed and power, their energy issues become more and more prevalent. The need to develop and promote environmentally friendly computer technologies and systems has also come to the forefront

High Performance Wireless Vertical Links with Scalable Time-Domain Mixed-Signal Processing for 3D Network-on-Chip

High Performance Wireless Vertical Links with Scalable Time-Domain Mixed-Signal Processing for 3D Network-on-Chip
Author: Srinivasan Gopal
Publisher:
Total Pages: 94
Release: 2018
Genre:
ISBN:

Wireless interconnects using near-field inductive coupling (NFIC) enables contactless vertical communications necessary for the design of energy efficient and robust 3-D manycore systems. However, the achievable performance, energy efficiency, bandwidth, and associated area overhead of NFICs are intertwined imposing significant design challenges and tradeoffs to explore the optimum link configuration. To address these challenges, in this work, a holistic design approach is proposed for exploring energy-efficient NFICs and target to exploit the benefits of the NFICs in the context of efficient and reliable network-on-chip (NoC) design. The proposed design framework employs statistical link analysis to select optimum NFIC-link configuration and is significantly more efficient in terms of energy efficiency and area overhead compared to the state-of-the-art counterparts. We demonstrate that 3-D NoCs incorporating NFIC-enabled links outperform through-silicon-via (TSV) counterparts. In addition, the overall reliability of TSV- and NFIC-enabled hybrid 3-D NoC is significantly better than only TSV-based NoCs in order to counteract the electromigration and workload-induced stress challenges.In addition, this work also presents an echo-canceller-less wireless-wireline hybrid 3D interconnect for simultaneous bidirectional (SBD) vertical communication. This is accomplished by combining wireless near-field inductive coupling channel (NFIC) that encompasses wireline through-silicon via (TSV) channels to form a bidirectional vertical link for the first time using face-to-back 3D integration technologies applicable for multi-layer vertical communication. In experimental demonstration, the transceiver simultaneously communicates at an effective data rate of 6 Gb/s consuming 290 fJ/bit over the NFIC and TSV channels in 65nm CMOS process. The developed hybrid interconnect architecture exhibits more than 2x improved link performance over state-of-the-art 3D SBD link.

Networks on Chips

Networks on Chips
Author: Giovanni De Micheli
Publisher: Elsevier
Total Pages: 408
Release: 2006-08-30
Genre: Technology & Engineering
ISBN: 0080473563

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs

On-Chip Communication Architectures

On-Chip Communication Architectures
Author: Sudeep Pasricha
Publisher: Morgan Kaufmann
Total Pages: 541
Release: 2010-07-28
Genre: Technology & Engineering
ISBN: 0080558283

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. On-Chip Communication Architecures is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends Detailed analysis of all popular standards for on-chip communication architectures Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts Future trends that with have a significant impact on research and design of communication architectures over the next several years

Network-on-Chip Security and Privacy

Network-on-Chip Security and Privacy
Author: Prabhat Mishra
Publisher: Springer Nature
Total Pages: 496
Release: 2021-06-04
Genre: Technology & Engineering
ISBN: 3030691314

This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems.

Design, Automation, and Test in Europe

Design, Automation, and Test in Europe
Author: Rudy Lauwereins
Publisher: Springer Science & Business Media
Total Pages: 499
Release: 2008-01-08
Genre: Technology & Engineering
ISBN: 1402064888

In 2007 The Design, Automation and Test in Europe (DATE) conference celebrated its tenth anniversary. As a tribute to the chip and system-level design and design technology community, this book presents a compilation of the three most influential papers of each year. This provides an excellent historical overview of the evolution of a domain that contributed substantially to the growth and competitiveness of the circuit electronics and systems industry.