As computer systems develop, processing speeds and user expectations grow. The demand for fast image rendering plays an increasingly important role in academic, industrial and commercial settings--from animated, photo-realistic images for cartoons and films, medical imaging and lighting design, to scientific visualisation for empirical data viewing, computer vision and molecular modelling. The realization of architectures for high performance, high quality image generation is achieved through the development and utilisation of suitable algorithms, advanced VLSI design techniques and novel approaches to simulation. This thesis introduces techniques for the generation and processing of data, primarily for the visualisation of 3D objects, for applications including real-time vehicle simulation graphics systems and workstation displays, and methods for increasing image realism. A behavioural simulation of the PRISM Geometry Processor is presented, for the production o f test vector data to prove the correctness of the design. This simulates the algorithms, data structures and communication techniques for a pipelined system architecture. The Geometry Processor is a VLSI design for performing many o f the operations required for the calculation and manipulation of data from 3D world coordinates, to 2D screen coordinates. The PRISM Advanced Image Display Architecture is a display processor design comprising three subsystems--the Span Generator, the Pixel Generator and the Rendering Unit. This novel architecture and a simulation strategy is described, with emphasis on the system algorithms. VLSI ASICs are used within each subsystem for high-speed span and pixel processing. In particular, the algorithms, design, operation and implementation of a novel ASIC, the Span Generator, for the generation of spans from triangle descriptions, is given. The PRISM architectures have targeted specific applications which attain high performance through the exclusion of both unnecessary functionality and general-purpose flexibility. A hardware and software architecture, which greatly expands on the experience gained from the PRISM architectures, offering the potential of large-scale parallelism for graphics and related computation is presented.