Vlsi Specification Verification And Synthesis
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| Author | : Graham Birtwistle |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 405 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461320070 |
VLSI Specification, Verification and Synthesis Proceedings of a workshop held in Calgary from 12-16 January 1987. The collection of papers in this book represents some of the discussions and presentations at a workshop on hardware verification held in Calgary, January 12-16 1987. The thrust of the workshop was to give the floor to a few leading researchers involved in the use of formal approaches to VLSI design, and provide them ample time to develop not only their latest ideas but also the evolution of these ideas. In contrast to simulation, where the objective is to assist in detecting errors in system behavior in the case of some selected inputs, the intent of hardware verification is to formally prove that a chip design meets a specification of its intended behavior (for all acceptable inputs). There are several important applications where formal verification of designs may be argued to be cost-effective. Examples include hardware components used in "safety critical" applications such as flight control, industrial plants, and medical life-support systems (such as pacemakers). The problems are of such magnitude in certain defense applications that the UK Ministry of Defense feels it cannot rely on commercial chips and has embarked on a program of producing formally verified chips to its own specification. Hospital, civil aviation, and transport boards in the UK will also use these chips. A second application domain for verification is afforded by industry where specific chips may be used in high volume or be remotely placed.
| Author | : Charles Rattray |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 620 |
| Release | : 2013-11-11 |
| Genre | : Computers |
| ISBN | : 1447135342 |
This volume contains papers presented at the BCS-FACS Workshop on Specification and Verification of Concurrent Systems held on 6-8 July 1988, at the University of Stirling, Scotland. Specification and verification techniques are playing an increasingly important role in the design and production of practical concurrent systems. The wider application of these techniques serves to identify difficult problems that require new approaches to their solution and further developments in specification and verification. The Workshop aimed to capture this interplay by providing a forum for the exchange of the experience of academic and industrial experts in the field. Presentations included: surveys, original research, practical experi ence with methods, tools and environments in the following or related areas: Object-oriented, process, data and logic based models and specifi cation methods for concurrent systems Verification of concurrent systems Tools and environments for the analysis of concurrent systems Applications of specification languages to practical concurrent system design and development. We should like to thank the invited speakers and all the authors of the papers whose work contributed to making the Workshop such a success. We were particularly pleased with the international response to our call for papers. Invited Speakers Pierre America Philips Research Laboratories University of Warwick Professor M. Joseph David Freestone British Telecom Organising Committee Charles Rattray Dr Muffy Thomas Dr Simon Jones Dr John Cooke Professor Ken Turner Derek Coleman Maurice Naftalin Dr Peter Scharbach vi Preface We would like to aeknowledge the finaneial eontribution made by SD-Sysems Designers pie, Camberley, Surrey.
| Author | : George J. Milne |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 284 |
| Release | : 1993-05-12 |
| Genre | : Computers |
| ISBN | : 9783540567783 |
These proceedings contain the papers presented at the Advanced Research Working Conference on Correct Hardware Design Methodologies, held in Arles, France, in May 1993, and organized by the ESPRIT Working Group 6018 CHARME-2and the Universit de Provence, Marseille, in cooperation with IFIP Working Group 10.2. Formal verification is emerging as a plausible alternative to exhaustive simulation for establishing correct digital hardware designs. The validation of functional and timing behavior is a major bottleneck in current VLSI design systems, slowing the arrival of products in the marketplace with its associated increase in cost. From being a predominantly academic area of study until a few years ago, formal design and verification techniques are now beginning to migrate into industrial use. As we are now witnessing an increase in activity in this area in both academia and industry, the aim of this working conference was to bring together researchers and users from both communities.
| Author | : Nam Ling |
| Publisher | : World Scientific |
| Total Pages | : 134 |
| Release | : 1999 |
| Genre | : Technology & Engineering |
| ISBN | : 9789810238674 |
Circuits and architectures have become more complex in terms of structure, interconnection topology, and data flow. Design correctness has become increasingly significant, as errors in design may result in strenuous debugging, or even in the repetition of a costly manufacturing process. Although circuit simulation has been used traditionally and widely as the technique for checking hardware and architectural designs, it does not guarantee the conformity of designs to specifications. Formal methods therefore become vital in guaranteeing the correctness of designs and have thus received a significant amount of attention in the CAD industry today.This book presents a formal method for specifying and verifying the correctness of systolic array designs. Such architectures are commonly found in the form of accelerators for digital signal, image, and video processing. These arrays can be quite complicated in topology and data flow. In the book, a formalism called STA is defined for these kinds of dynamic environments, with a survey of related techniques. A framework for specification and verification is established. Formal verification techniques to check the correctness of the systolic networks with respect to the algorithmic level specifications are explained. The book also presents a Prolog-based formal design verifier (named VSTA), developed to automate the verification process, as using a general purpose theorem prover is usually extremely time-consuming. Several application examples are included in the book to illustrate how formal techniques and the verifier can be used to automate proofs.
| Author | : Geraint Jones |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 364 |
| Release | : 2013-12-14 |
| Genre | : Computers |
| ISBN | : 144713544X |
These proceedings contain the papers presented at a workshop on Designing Correct Circuits, jointly organised by the Universities of Oxford and Glasgow, and held in Oxford on 26-28 September 1990. There is a growing interest in the application to hardware design of the techniques of software engineering. As the complexity of hardware systems grows, and as the cost both in money and time of making design errors becomes more apparent, so there is an eagerness to build on the success of mathematical techniques in program develop ment. The harsher constraints on hardware designers mean both that there is a greater need for good abstractions and rigorous assurances of the trustworthyness of designs, and also that there is greater reason to expect that these benefits can be realised. The papers presented at this workshop consider the application of mathematics to hardware design at several different levels of abstraction. At the lowest level of this spectrum, Zhou and Hoare show how to describe and reason about synchronous switching circuits using UNilY, a formalism that was developed for reasoning about parallel programs. Aagaard and Leeser use standard mathematical tech niques to prove correct their implementation of an algorithm for Boolean simplification. The circuits generated by their formal synthesis system are thus correct by construction. Thuau and Pilaud show how the declarative language LUSTRE, which was designed for program ming real-time systems, can be used to specify synchronous circuits.
| Author | : Carver Mead |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 250 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461316391 |
This volume contains the proceedings of a workshop on Analog Integrated Neural Systems held May 8, 1989, in connection with the International Symposium on Circuits and Systems. The presentations were chosen to encompass the entire range of topics currently under study in this exciting new discipline. Stringent acceptance requirements were placed on contributions: (1) each description was required to include detailed characterization of a working chip, and (2) each design was not to have been published previously. In several cases, the status of the project was not known until a few weeks before the meeting date. As a result, some of the most recent innovative work in the field was presented. Because this discipline is evolving rapidly, each project is very much a work in progress. Authors were asked to devote considerable attention to the shortcomings of their designs, as well as to the notable successes they achieved. In this way, other workers can now avoid stumbling into the same traps, and evolution can proceed more rapidly (and less painfully). The chapters in this volume are presented in the same order as the corresponding presentations at the workshop. The first two chapters are concerned with fmding solutions to complex optimization problems under a predefmed set of constraints. The first chapter reports what is, to the best of our knowledge, the first neural-chip design. In each case, the physics of the underlying electronic medium is used to represent a cost function in a natural way, using only nearest-neighbor connectivity.
| Author | : Kenneth S. Kundert |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 259 |
| Release | : 2013-03-09 |
| Genre | : Technology & Engineering |
| ISBN | : 1475720815 |
The motivation for starting the work described in this book was the interest that Hewlett-Packard's microwave circuit designers had in simulation techniques that could tackle the problem of finding steady state solutions for nonlinear circuits, particularly circuits containing distributed elements such as transmission lines. Examining the problem of computing steady-state solutions in this context has led to a collection of novel numerical algorithms which we have gathered, along with some background material, into this book. Although we wished to appeal to as broad an audience as possible, to treat the subject in depth required maintaining a narrow focus. Our compromise was to assume that the reader is familiar with basic numerical methods, such as might be found in [dahlquist74] or [vlach83], but not assume any specialized knowledge of methods for steady-state problems. Although we focus on algorithms for computing steady-state solutions of analog and microwave circuits, the methods herein are general in nature and may find use in other disciplines. A number of new algorithms are presented, the contributions primarily centering around new approaches to harmonic balance and mixed frequency-time methods. These methods are described, along with appropriate background material, in what we hope is a reasonably satisfying blend of theory, practice, and results. The theory is given so that the algorithms can be fully understood and their correctness established.
| Author | : Jose G. Delgado-Frias |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 285 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461316197 |
| Author | : Wael Badawy |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 464 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461503515 |
System-on-Chip for Real-Time Applications will be of interest to engineers, both in industry and academia, working in the area of SoC VLSI design and application. It will also be useful to graduate and undergraduate students in electrical and computer engineering and computer science. A selected set of papers from the 2nd International Workshop on Real-Time Applications were used to form the basis of this book. It is organized into the following chapters: -Introduction; -Design Reuse; -Modeling; -Architecture; -Design Techniques; -Memory; -Circuits; -Low Power; -Interconnect and Technology; -MEMS. System-on-Chip for Real-Time Applications contains many signal processing applications and will be of particular interest to those working in that community.
| Author | : Vasant B. Rao |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 218 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461317096 |
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.
