"The main focus of this thesis is to mitigate circuit design challenges under ultra-low power (ULP) and ultra-low voltage (ULV) conditions to implement ULP and ULV circuits and systems suitable for low power wireless sensor networks operating from the energy scavenged from the environment. The design of power ecient transceivers requires careful optimization at the circuit level. ULV circuit design challenges are fully investigated in this work to address its importance in low power transceivers operating with energy harvesting. It is shown that ULV supply has severe impacts on the performance of a MOS transistor. New solutions like forward body biasing, new biasing scheme optimized for ULP and ULV design, current-reuse and etc. are introduced to mitigate these performance degradations.Several ULP and ULV wideband RF low noise amplifiers (LNAs) are designed and fabricated to prove the concept. The rst one is a resistive shunt-feedback LNA fabricated in a 90-nm TSMC CMOS using multiple ULP and ULV techniques. This prototype achieves high gure of merit (FoM) while consuming sub-mW power from a 0.5-V supply. The secondone is an inductorless, wideband LNA implemented in an IBM 0.13-um CMOS technology which uses a current-reused tunable active shunt-feedback for input impedance matching.Employing ULP design techniques, this LNA consumes only 400-W while illustrating high FoM. The third fabricated LNA, also implemented in an IBM 0.13-um CMOS, utilizes multiple ULP and ULV design techniques which lead to the best FoM in the literature to the best of the author knowledge, with only 0.25-mW power from a 0.5-V supply. Finally, aUWB current-reuse noise cancelling LNA is implemented that achieves high performance while consuming 410-W from a 0.4-V supply which makes it suitable for systems operating from energy harvesting.As a low power system-level solution, impulse radio ultra-wideband (IR-UWB) technology with short pulses in the time domain which allows the transceiver to be duty cycled, is considered for ULP wireless sensor networks. In this work, a non-coherent chirp-FSK IR-UWB receiver based on continuous time slicing and low power injection locked clock recovery is implemented. The RF front-end of the receiver is implemented in an IBM 0.13m CMOS.It achieves a tuned voltage gain of 20-30-dB with a NF of 7-dB and the static power consumption of only 1.75-mW from a 0.5-V supply voltage. Overall, the proposed techniques, circuits and system improve the power eciency both at circuit and system level and are suitable for ULP and ULV applications such as energy scavenged wireless sensor networks." --