Specification and Verification of Concurrent Systems

Specification and Verification of Concurrent Systems
Author: Charles Rattray
Publisher: Springer Science & Business Media
Total Pages: 620
Release: 2013-11-11
Genre: Computers
ISBN: 1447135342

This volume contains papers presented at the BCS-FACS Workshop on Specification and Verification of Concurrent Systems held on 6-8 July 1988, at the University of Stirling, Scotland. Specification and verification techniques are playing an increasingly important role in the design and production of practical concurrent systems. The wider application of these techniques serves to identify difficult problems that require new approaches to their solution and further developments in specification and verification. The Workshop aimed to capture this interplay by providing a forum for the exchange of the experience of academic and industrial experts in the field. Presentations included: surveys, original research, practical experi ence with methods, tools and environments in the following or related areas: Object-oriented, process, data and logic based models and specifi cation methods for concurrent systems Verification of concurrent systems Tools and environments for the analysis of concurrent systems Applications of specification languages to practical concurrent system design and development. We should like to thank the invited speakers and all the authors of the papers whose work contributed to making the Workshop such a success. We were particularly pleased with the international response to our call for papers. Invited Speakers Pierre America Philips Research Laboratories University of Warwick Professor M. Joseph David Freestone British Telecom Organising Committee Charles Rattray Dr Muffy Thomas Dr Simon Jones Dr John Cooke Professor Ken Turner Derek Coleman Maurice Naftalin Dr Peter Scharbach vi Preface We would like to aeknowledge the finaneial eontribution made by SD-Sysems Designers pie, Camberley, Surrey.

Automated Verification of Concurrent Search Structures

Automated Verification of Concurrent Search Structures
Author: Krishna Siddharth
Publisher: Springer Nature
Total Pages: 182
Release: 2022-05-31
Genre: Mathematics
ISBN: 3031018060

Search structures support the fundamental data storage primitives on key-value pairs: insert a pair, delete by key, search by key, and update the value associated with a key. Concurrent search structures are parallel algorithms to speed access to search structures on multicore and distributed servers. These sophisticated algorithms perform fine-grained synchronization between threads, making them notoriously difficult to design correctly. Indeed, bugs have been found both in actual implementations and in the designs proposed by experts in peer-reviewed publications. The rapid development and deployment of these concurrent algorithms has resulted in a rift between the algorithms that can be verified by the state-of-the-art techniques and those being developed and used today. The goal of this book is to show how to bridge this gap in order to bring the certified safety of formal verification to high-performance concurrent search structures. Similar techniques and frameworks can be applied to concurrent graph and network algorithms beyond search structures.

Specifying and Verifying Concurrent Programs

Specifying and Verifying Concurrent Programs
Author: L. Lamport
Publisher:
Total Pages: 94
Release: 1985
Genre:
ISBN:

The goal of this project was the development of formal methods for the specification and verification of concurrent programs to help avoid software errors in concurrent systems. This involved research in three areas: Specification; Verification; and Semantics. Contents: What It Means for a Concurrent Program to Satisfy a Specification; An Axiomatic Semantics of Concurrent Programming Languages; Constraints - A Uniform Approach to Aliasing and Typing.

Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering

Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering
Author: Tiziana Margaria
Publisher: Springer Nature
Total Pages: 437
Release: 2022-10-19
Genre: Computers
ISBN: 3031197569

This four-volume set LNCS 13701-13704 constitutes contributions of the associated events held at the 11th International Symposium on Leveraging Applications of Formal Methods, ISoLA 2022, which took place in Rhodes, Greece, in October/November 2022. The contributions in the four-volume set are organized according to the following topical sections: specify this - bridging gaps between program specification paradigms; x-by-construction meets runtime verification; verification and validation of concurrent and distributed heterogeneous systems; programming - what is next: the role of documentation; automated software re-engineering; DIME day; rigorous engineering of collective adaptive systems; formal methods meet machine learning; digital twin engineering; digital thread in smart manufacturing; formal methods for distributed computing in future railway systems; industrial day.

Computer Aided Verification

Computer Aided Verification
Author: Kousha Etessami
Publisher: Springer Science & Business Media
Total Pages: 579
Release: 2005-06-24
Genre: Computers
ISBN: 3540272313

This book constitutes the refereed proceedings of the 17th International Conference on Computer Aided Verification, CAV 2005, held in Edinburgh, Scotland, UK in July 2005. The 32 revised full papers presented together with 16 tool papers and 3 invited papers, as well as a report on a special tools competition were carefully reviewed and selected from 155 submissions. The papers cover all current issues in computer aided verification and model checking, ranging from foundational and methodological issues to the evaluation of major tools and systems.

High-Level Verification

High-Level Verification
Author: Sudipta Kundu
Publisher: Springer Science & Business Media
Total Pages: 176
Release: 2011-05-18
Genre: Technology & Engineering
ISBN: 1441993592

Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based testing. This book focuses on high-level verification, presenting a design methodology that relies upon advances in synthesis techniques as well as on incremental refinement of the design process. These refinements can be done manually or through elaboration tools. This book discusses verification of specific properties in designs written using high-level languages, as well as checking that the refined implementations are equivalent to their high-level specifications. The novelty of each of these techniques is that they use a combination of formal techniques to do scalable verification of system designs completely automatically. The verification techniques presented in this book include methods for verifying properties of high-level designs and methods for verifying that the translation from high-level design to a low-level Register Transfer Language (RTL) design preserves semantics. Used together, these techniques guarantee that properties verified in the high-level design are preserved through the translation to low-level RTL.

Automated Verification of Concurrent Search Structures

Automated Verification of Concurrent Search Structures
Author: Siddharth Krishna
Publisher: Morgan & Claypool Publishers
Total Pages: 190
Release: 2021-06-01
Genre: Computers
ISBN: 163639129X

Search structures support the fundamental data storage primitives on key-value pairs: insert a pair, delete by key, search by key, and update the value associated with a key. Concurrent search structures are parallel algorithms to speed access to search structures on multicore and distributed servers. These sophisticated algorithms perform fine-grained synchronization between threads, making them notoriously difficult to design correctly. Indeed, bugs have been found both in actual implementations and in the designs proposed by experts in peer-reviewed publications. The rapid development and deployment of these concurrent algorithms has resulted in a rift between the algorithms that can be verified by the state-of-the-art techniques and those being developed and used today. The goal of this book is to show how to bridge this gap in order to bring the certified safety of formal verification to high-performance concurrent search structures. Similar techniques and frameworks can be applied to concurrent graph and network algorithms beyond search structures.

Automated Technology for Verification and Analysis

Automated Technology for Verification and Analysis
Author: Dang Van Hung
Publisher: Springer
Total Pages: 540
Release: 2013-08-30
Genre: Computers
ISBN: 3319024442

This book constitutes the refereed proceedings of the 11th International Symposium on Automated Technology for Verification and Analysis, ATVA 2013, held at Hanoi, Vietnam, in October 2013. The 27 regular papers, 3 short papers and 12 tool papers presented together with 3 invited talks were carefully selected from73 submissions. The papers are organized in topical, sections on analysis and verification of hardware circuits, systems-on-chip and embedded systems, analysis of real-time, hybrid, priced/weighted and probabilistic systems, deductive, algorithmic, compositional, and abstraction/refinement techniques for analysis and verification, analytical techniques for safety, security, and dependability, testing and runtime analysis based on verification technology, analysis and verification of parallel and concurrent hardware/software systems, verification in industrial practice, and applications and case studies.