Proceedings International Symposium On Asynchronous Circuit And Systems
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Proceedings of Seventh International Congress on Information and Communication Technology
| Author | : Xin-She Yang |
| Publisher | : Springer Nature |
| Total Pages | : 889 |
| Release | : 2022-07-26 |
| Genre | : Technology & Engineering |
| ISBN | : 9811916101 |
This book gathers selected high-quality research papers presented at the Seventh International Congress on Information and Communication Technology, held at Brunel University, London, on February 21–24, 2022. It discusses emerging topics pertaining to information and communication technology (ICT) for managerial applications, e-governance, e-agriculture, e-education and computing technologies, the Internet of Things (IoT) and e-mining. Written by respected experts and researchers working on ICT, the book offers a valuable asset for young researchers involved in advanced studies. The work is presented in four volumes.
Completion Detection in Asynchronous Circuits
| Author | : Pallavi Srivastava |
| Publisher | : Springer Nature |
| Total Pages | : 129 |
| Release | : 2022-11-08 |
| Genre | : Technology & Engineering |
| ISBN | : 3031183975 |
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
Energy Autonomous Micro and Nano Systems
| Author | : Marc Belleville |
| Publisher | : John Wiley & Sons |
| Total Pages | : 247 |
| Release | : 2012-12-17 |
| Genre | : Technology & Engineering |
| ISBN | : 1118587820 |
Providing a detailed overview of the fundamentals and latest developments in the field of energy autonomous microsystems, this book delivers an in-depth study of the applications in the fields of health and usage monitoring in aeronautics, medical implants, and home automation, drawing out the main specifications on such systems. Introductory information on photovoltaic, thermal and mechanical energy harvesting, and conversion, is given, along with the latest results in these fields. This book also provides a state of the art of ultra-low power sensor interfaces, digital signal processing and wireless communications. In addition, energy optimizations at the sensor node and sensors network levels are discussed, thus completing this overview. This book details the challenges and latest techniques available to readers who are interested in this field. A major strength of this book is that the first three chapters are application orientated and thus, by setting the landscape, introduce the technical chapters. There is also a good balance between the technical application, covering all the system-related aspects and, within each chapter, details on the physics, materials and technologies associated with electronics. Contents Introduction. Introduction to Energy Autonomous Micro and Nano Systems and Presentation of Contributions, Marc Belleville and Cyril Condemine. 1. Sensors at the Core of Building Control, Gilles Chabanis, Laurent Chiesi, Hynek Raisigel, Isabelle Ressejac and Véronique Boutin. 2. Toward Energy Autonomous MedicalImplants, Raymond Campagnolo and Daniel Kroiss. 3. Energy Autonomous Systems in Aeronautic Applications, Thomas Becker, Jirka Klaue and Martin Kluge. 4. Energy Harvesting by Photovoltaic Effect, Emmanuelle Rouvière, Simon Perraud, Cyril Condemine and Guy Waltisperger. 5. Mechanical Energy Harvesting, Ghislain Despesse, Jean Jacques Chaillout, Sébastien Boisseau and Claire Jean-Mistral. 6. Thermal Energy Harvesting, Tristan Caroff, Emmanuelle Rouvière and Jérôme Willemin. 7. Lithium Micro-Batteries, Raphaël Salot. 8. Ultra-Low-Power Sensors, Pascal Nouet, Norbert Dumas, Laurent Latorre and Frédérick Mailly. 9. Ultra-Low-Power Signal Processing in Autonomous Systems, Christian Piguet. 10. Ultra-Low-Power Radio Frequency Communications and Protocols, Eric Mercier. 11. Energy Management in an Autonomous Microsystem, Jean-Frédéric Christmann, Edith Beigne, Cyril Condemine, Jérôme Willemin and Christian Piguet. 12. Optimizing Energy Efficiency of Sensor Networks, Olivier Sentieys and Olivier Berder.
Bio-Inspired Fault-Tolerant Algorithms for Network-on-Chip
| Author | : Muhammad Athar Javed Sethi |
| Publisher | : CRC Press |
| Total Pages | : 212 |
| Release | : 2020-03-17 |
| Genre | : Computers |
| ISBN | : 1000048055 |
Network on Chip (NoC) addresses the communication requirement of different nodes on System on Chip. The bio-inspired algorithms improve the bandwidth utilization, maximize the throughput and reduce the end-to-end latency and inter-flit arrival time. This book exclusively presents in-depth information regarding bio-inspired algorithms solving real world problems focussing on fault-tolerant algorithms inspired by the biological brain and implemented on NoC. It further documents the bio-inspired algorithms in general and more specifically, in the design of NoC. It gives an exhaustive review and analysis of the NoC architectures developed during the last decade according to various parameters. Key Features: Covers bio-inspired solutions pertaining to Network-on-Chip (NoC) design solving real world examples Includes bio-inspired NoC fault-tolerant algorithms with detail coding examples Lists fault-tolerant algorithms with detailed examples Reviews basic concepts of NoC Discusses NoC architectures developed-to-date
Network-on-Chip
| Author | : Santanu Kundu |
| Publisher | : CRC Press |
| Total Pages | : 388 |
| Release | : 2018-09-03 |
| Genre | : Technology & Engineering |
| ISBN | : 1466565276 |
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design, communication methodology, evaluation framework, and mapping of applications onto NoC. It details the design and evaluation of different proposed NoC structures, low-power techniques, signal integrity and reliability issues, application mapping, testing, and future trends. Utilizing examples of chips that have been implemented in industry and academia, this text presents the full architectural design of components verified through implementation in industrial CAD tools. It describes NoC research and developments, incorporates theoretical proofs strengthening the analysis procedures, and includes algorithms used in NoC design and synthesis. In addition, it considers other upcoming NoC issues, such as low-power NoC design, signal integrity issues, NoC testing, reconfiguration, synthesis, and 3-D NoC design. This text comprises 12 chapters and covers: The evolution of NoC from SoC—its research and developmental challenges NoC protocols, elaborating flow control, available network topologies, routing mechanisms, fault tolerance, quality-of-service support, and the design of network interfaces The router design strategies followed in NoCs The evaluation mechanism of NoC architectures The application mapping strategies followed in NoCs Low-power design techniques specifically followed in NoCs The signal integrity and reliability issues of NoC The details of NoC testing strategies reported so far The problem of synthesizing application-specific NoCs Reconfigurable NoC design issues Direction of future research and development in the field of NoC Network-on-Chip: The Next Generation of System-on-Chip Integration covers the basic topics, technology, and future trends relevant to NoC-based design, and can be used by engineers, students, and researchers and other industry professionals interested in computer architecture, embedded systems, and parallel/distributed systems.
Single Flux Quantum Integrated Circuit Design
| Author | : Gleb Krylov |
| Publisher | : Springer Nature |
| Total Pages | : 441 |
| Release | : |
| Genre | : |
| ISBN | : 3031474759 |
Sequential Optimization of Asynchronous and Synchronous Finite-State Machines
| Author | : Robert M. Fuhrer |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 269 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461514177 |
This text contributes to the field of sequential optimization for finite-state machines, introducing several new provably-optimal algorithms, presenting practical software implementations of each of these algorithms and introducing a complete new CAD package, called MINIMALIST. Real-world industrial designs are used as benchmark circuits throughout.
CMOS Processors and Memories
| Author | : Krzysztof Iniewski |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 381 |
| Release | : 2010-08-09 |
| Genre | : Technology & Engineering |
| ISBN | : 9048192161 |
CMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored. CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a “hardware design space exploration” methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures. The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell’s device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described. CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.
A Designer's Guide to Asynchronous VLSI
| Author | : Peter A. Beerel |
| Publisher | : Cambridge University Press |
| Total Pages | : 353 |
| Release | : 2010-02-04 |
| Genre | : Technology & Engineering |
| ISBN | : 1139485288 |
Create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. This practical alternative to conventional synchronous design enables performance close to full-custom designs with design times that approach commercially available ASIC standard cell flows. It includes design trade-offs, specific design examples, and end-of-chapter exercises. Emphasis throughout is placed on practical techniques and real-world applications, making this ideal for circuit design students interested in alternative design styles and system-on-chip circuits, as well as circuit designers in industry who need new solutions to old problems.
