Principles Of Secure Processor Architecture Design
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| Author | : Jakub Szefer |
| Publisher | : Morgan & Claypool Publishers |
| Total Pages | : 175 |
| Release | : 2018-10-18 |
| Genre | : Computers |
| ISBN | : 1681730022 |
This book presents the different challenges of secure processor architecture design for architects working in industry who want to add security features to their designs as well as graduate students interested in research on architecture and hardware security. It educates readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, it presents numerous design suggestions, as well as discussing pitfalls and fallacies that designers should avoid. With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book gives readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered).
| Author | : Jakub Szefer |
| Publisher | : Springer Nature |
| Total Pages | : 154 |
| Release | : 2022-06-01 |
| Genre | : Technology & Engineering |
| ISBN | : 3031017609 |
With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book aims to give readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered). This book aims to present the different challenges of secure processor architecture design to graduate students interested in research on architecture and hardware security and computer architects working in industry interested in adding security features to their designs. It aims to educate readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, this book presents numerous design suggestions, as well as discusses pitfalls and fallacies that designers should avoid.
| Author | : Ruby B. Lee |
| Publisher | : Springer Nature |
| Total Pages | : 96 |
| Release | : 2022-05-31 |
| Genre | : Technology & Engineering |
| ISBN | : 3031017420 |
Design for security is an essential aspect of the design of future computers. However, security is not well understood by the computer architecture community. Many important security aspects have evolved over the last several decades in the cryptography, operating systems, and networking communities. This book attempts to introduce the computer architecture student, researcher, or practitioner to the basic concepts of security and threat-based design. Past work in different security communities can inform our thinking and provide a rich set of technologies for building architectural support for security into all future computers and embedded computing devices and appliances. I have tried to keep the book short, which means that many interesting topics and applications could not be included. What the book focuses on are the fundamental security concepts, across different security communities, that should be understood by any computer architect trying to design or evaluate security-aware computer architectures.
| Author | : Victor Costan |
| Publisher | : |
| Total Pages | : 248 |
| Release | : 2017 |
| Genre | : Computer architecture |
| ISBN | : 9781680833010 |
This manuscript is the first in a two part survey and analysis of the state of the art in secure processor systems, with a specific focus on remote software attestation and software isolation. This manuscript first examines the relevant concepts in computer architecture and cryptography, and then surveys attack vectors and existing processor systems claiming security for remote computation and/or software isolation. This work examines in detail the modern isolation container (enclave) primitive as a means to minimize trusted software given practical trusted hardware and reasonable performance overhead. Specifically, this work examines in detail the programming model and software design considerations of Intel's Software Guard Extensions (SGX), as it is an available and documented enclave-capable system. Part II of this work is a deep dive into the implementation and security evaluation of two modern enclave-capable secure processor systems: SGX and MIT's Sanctum. The complex but insufficient threat model employed by SGX motivates Sanctum, which achieves stronger security guarantees under software attacks with an equivalent programming model. This work advocates a principled, transparent, and well-scrutinized approach to secure system design, and argues that practical guarantees of privacy and integrity for remote computation are achievable at a reasonable design cost and performance overhead.
| Author | : Junichiro Makino |
| Publisher | : Springer Nature |
| Total Pages | : 167 |
| Release | : 2021-08-20 |
| Genre | : Computers |
| ISBN | : 3030768716 |
This book describes how we can design and make efficient processors for high-performance computing, AI, and data science. Although there are many textbooks on the design of processors we do not have a widely accepted definition of the efficiency of a general-purpose computer architecture. Without a definition of the efficiency, it is difficult to make scientific approach to the processor design. In this book, a clear definition of efficiency is given and thus a scientific approach for processor design is made possible. In chapter 2, the history of the development of high-performance processor is overviewed, to discuss what quantity we can use to measure the efficiency of these processors. The proposed quantity is the ratio between the minimum possible energy consumption and the actual energy consumption for a given application using a given semiconductor technology. In chapter 3, whether or not this quantity can be used in practice is discussed, for many real-world applications. In chapter 4, general-purpose processors in the past and present are discussed from this viewpoint. In chapter 5, how we can actually design processors with near-optimal efficiencies is described, and in chapter 6 how we can program such processors. This book gives a new way to look at the field of the design of high-performance processors.
| Author | : John Paul Shen |
| Publisher | : Waveland Press |
| Total Pages | : 657 |
| Release | : 2013-07-30 |
| Genre | : Computers |
| ISBN | : 147861076X |
Conceptual and precise, Modern Processor Design brings together numerous microarchitectural techniques in a clear, understandable framework that is easily accessible to both graduate and undergraduate students. Complex practices are distilled into foundational principles to reveal the authors insights and hands-on experience in the effective design of contemporary high-performance micro-processors for mobile, desktop, and server markets. Key theoretical and foundational principles are presented in a systematic way to ensure comprehension of important implementation issues. The text presents fundamental concepts and foundational techniques such as processor design, pipelined processors, memory and I/O systems, and especially superscalar organization and implementations. Two case studies and an extensive survey of actual commercial superscalar processors reveal real-world developments in processor design and performance. A thorough overview of advanced instruction flow techniques, including developments in advanced branch predictors, is incorporated. Each chapter concludes with homework problems that will institute the groundwork for emerging techniques in the field and an introduction to multiprocessor systems.
| Author | : Raghudeep Kannavara |
| Publisher | : |
| Total Pages | : 178 |
| Release | : 2009 |
| Genre | : Biometry |
| ISBN | : |
Secure computing is gaining importance in recent times as computing capability is increasingly becoming distributed and information is everywhere. Prevention of piracy and digital rights management has become very important. Information security is mandatory rather than an additional feature. Numerous software techniques have been proposed to provide certain level of copyright and intellectual property protection. Techniques like obfuscation attempt to transform the code into a form that is harder to reverse engineer. Tamper-proofing causes a program to malfunction when it detects that it has been modified. Software watermarking embeds copyright notice in the software code to allow the owners of the software to assert their intellectual property rights. The software techniques discourage software theft, can trace piracy, prove ownership, but cannot prevent copying itself. Thus, software based security firewalls and encryption is not completely safe from determined hackers. This necessitates the need for information security at the hardware level, where secure processors assume importance. In this dissertation, a detailed architecture and instruction set of the SCAN-Secure Processor is proposed. The SCAN-SP is a modified SparcV8 processor architecture with a new instruction set to handle image compression, encryption, information hiding based on SCAN methodology and biometric authentication based on Local Global Graph methodology. A SCAN based methodology for encryption and decryption of 32 bit instructions and data is proposed. The modules to support the new instructions are synthesized in reconfigurable logic and the results of FPGA synthesis are presented. The ultimate goal of the proposed work is a detailed study of the tradeoffs that exists between speed of execution and security of the processor. Designing a faster processor is not the goal of the proposed work, rather exploring the architecture to provide security is of prime importance.
| Author | : Christopher Wardlaw Fletcher |
| Publisher | : |
| Total Pages | : 101 |
| Release | : 2013 |
| Genre | : |
| ISBN | : |
This thesis considers encrypted computation where the user specifies encrypted inputs to an untrusted batch program controlled by an untrusted server. In batch computation, all data that the program might need is known at program start time. Encrypted computation on untrusted batch programs can be realized through fully homomorphic encryption (FHE) techniques, but FHE's current overheads limit its applicability. Secure processors (e.g., Aegis), coprocessors (e.g., TPM) or hardware extensions (e.g., TXT) typically require trust in the entire processor, the host operating system and the program that computes on the inputs. In this thesis, we design a secure processor architecture, called Ascend, that guarantees privacy of data given untrusted batch programs. The key idea in Ascend to guarantee privacy is parameterizable, obfuscated program execution. From the perspective of the Ascend chip's input/output and power pins, an untrusted server cannot learn anything about private user data regardless of the program run. Ascend uses Oblivious RAM (ORAM) techniques to hide memory access patterns and differential-power analysis (DPA) resistance techniques to hide data-dependent power draw. For each of the input/output and power channels, an Ascend chip exposes a set of public knobs that fully specify the observable behavior of the chip given any batch program and any input to that batch program. These knobs (e.g., specifying strict intervals for when external memory should be accessed) are controlled by the server and can be tuned, based on the server's apriori knowledge of the program, to trade-off performance and power without impacting security. Experimental results when running Ascend on SPEC benchmarks show an average 3.6x /6.6x and 5.2x /4.7x performance/power overhead-when hiding memory access pattern and power draw-using two schemes that capture the server's apriori knowledge in different ways. Furthermore-when hiding memory access pattern only-performance/power overheads drop to only 2.6x/2.2x. These surprising results mean that it is viable to only trust hardware and not software in some security-conscious applications.
| Author | : Shuangbao Paul Wang |
| Publisher | : John Wiley & Sons |
| Total Pages | : 342 |
| Release | : 2013-01-10 |
| Genre | : Computers |
| ISBN | : 111816881X |
The first book to introduce computer architecture for security and provide the tools to implement secure computer systems This book provides the fundamentals of computer architecture for security. It covers a wide range of computer hardware, system software and data concepts from a security perspective. It is essential for computer science and security professionals to understand both hardware and software security solutions to survive in the workplace. Examination of memory, CPU architecture and system implementation Discussion of computer buses and a dual-port bus interface Examples cover a board spectrum of hardware and software systems Design and implementation of a patent-pending secure computer system Includes the latest patent-pending technologies in architecture security Placement of computers in a security fulfilled network environment Co-authored by the inventor of the modern Computed Tomography (CT) scanner Provides website for lecture notes, security tools and latest updates
| Author | : Jay Ramachandran |
| Publisher | : John Wiley & Sons |
| Total Pages | : 480 |
| Release | : 2002-10-01 |
| Genre | : Computers |
| ISBN | : 0471430137 |
The first guide to tackle security architecture at the softwareengineering level Computer security has become a critical business concern, and, assuch, the responsibility of all IT professionals. In thisgroundbreaking book, a security expert with AT&T Business'srenowned Network Services organization explores system securityarchitecture from a software engineering perspective. He explainswhy strong security must be a guiding principle of the developmentprocess and identifies a common set of features found in mostsecurity products, explaining how they can and should impact thedevelopment cycle. The book also offers in-depth discussions ofsecurity technologies, cryptography, database security, applicationand operating system security, and more.
