Power Efficient Architectures For High Accuracy Analog To Digital Converters
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| Author | : Xinpeng Xing |
| Publisher | : Springer |
| Total Pages | : 200 |
| Release | : 2017-10-04 |
| Genre | : Technology & Engineering |
| ISBN | : 3319665650 |
This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especially focusing on mitigation of VCO nonlinearity and the improvement of power efficiency. It shows readers how to develop power-efficient complementary-metal-oxide-semiconductor (CMOS) ADCs for applications such as LTE, 802.11n, and VDSL2+. The material covered can also be applied to other specifications and technologies. Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems begins with a general introduction to the applications of an ADC in communications systems and the basic concepts of VCO-based ADCs. The text addresses a wide range of converter architectures including open- and closed-loop technologies. Special attention is paid to the replacement of power-hungry analog blocks with VCO-based circuits and to the mitigation of VCO nonline arity. Various MATLAB®/Simulink® models are provided for important circuit nonidealities, allowing designers and researchers to determine the required specifications for the different building blocks that form the systematic integrated-circuit design procedure. Five different VCO-based ADC design examples are presented, introducing innovations at both architecture and circuit levels. Of these designs, the best power efficiency of a high-bandwidth oversampling ADC is achieved in a 40 nm CMOS demonstration. This book is essential reading material for engineers and researchers working on low-power-analog and mixed-signal design and may be used by instructors teaching advanced courses on the subject. It provides a clear overview and comparison of VCO-based ADC architectures and gives the reader insight into the most important circuit imperfections.
| Author | : Amir Zjajo |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 311 |
| Release | : 2010-10-29 |
| Genre | : Technology & Engineering |
| ISBN | : 9048197252 |
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
| Author | : Yu Lin |
| Publisher | : Springer |
| Total Pages | : 124 |
| Release | : 2015-05-07 |
| Genre | : Technology & Engineering |
| ISBN | : 3319176803 |
This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the “smart data converters” concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.
| Author | : Anu Gupta |
| Publisher | : Springer Nature |
| Total Pages | : 358 |
| Release | : |
| Genre | : |
| ISBN | : 9819752698 |
| Author | : Tertulien Ndjountche |
| Publisher | : CRC Press |
| Total Pages | : 813 |
| Release | : 2017-12-19 |
| Genre | : Technology & Engineering |
| ISBN | : 1351833189 |
High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important trends in designing these analog circuits and provides a complete, in-depth examination of design techniques and circuit architectures, emphasizing practical aspects of integrated circuit implementation. Focusing on designing and verifying analog integrated circuits, the author reviews design techniques for more complex components such as amplifiers, comparators, and multipliers. The book details all aspects, from specification to the final chip, of the development and implementation process of filters, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), phase-locked loops (PLLs), and delay-locked loops (DLLs). It also describes different equivalent transistor models, design and fabrication considerations for high-density integrated circuits in deep-submicrometer process, circuit structures for the design of current mirrors and voltage references, topologies of suitable amplifiers, continuous-time and switched-capacitor circuits, modulator architectures, and approaches to improve linearity of Nyquist converters. The text addresses the architectures and performance limitation issues affecting circuit operation and provides conceptual and practical solutions to problems that can arise in the design process. This reference provides balanced coverage of theoretical and practical issues that will allow the reader to design CMOS analog integrated circuits with improved electrical performance. The chapters contain easy-to-follow mathematical derivations of all equations and formulas, graphical plots, and open-ended design problems to help determine most suitable architecture for a given set of performance specifications. This comprehensive and illustrative text for the design and analysis of CMOS analog integrated circuits serves as a valuable resource for analog circuit designers and graduate students in electrical engineering.
| Author | : Andrea Baschirotto |
| Publisher | : Springer Nature |
| Total Pages | : 322 |
| Release | : 2019-10-24 |
| Genre | : Technology & Engineering |
| ISBN | : 3030252671 |
This book is based on the 18 tutorials presented during the 28th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including next-generation analog-to-digital converters , high-performance power management systems and technology considerations for advanced IC design. For anyone involved in analog circuit research and development, this book will be a valuable summary of the state-of-the-art in these areas. Provides a summary of the state-of-the-art in analog circuit design, written by experts from industry and academia; Presents material in a tutorial-based format; Includes coverage of next-generation analog-to-digital converters, high-performance power management systems, and technology considerations for advanced IC design.
| Author | : Athanasios T. Ramkaj |
| Publisher | : Springer Nature |
| Total Pages | : 289 |
| Release | : 2023-01-12 |
| Genre | : Technology & Engineering |
| ISBN | : 3031227093 |
This book proposes innovative circuit, architecture, and system solutions in deep-scaled CMOS and FinFET technologies, which address the challenges in maximizing the accuracy*speed/power of multi-GHz sample rate and bandwidth Analog-to-Digital Converters (ADC)s. A new holistic approach is introduced that first identifies the major error sources of a converter’ building blocks, and quantitatively analyzes their impact on the overall performance, establishing the fundamental circuit-imposed accuracy – speed – power limits. The analysis extends to the architecture level, by introducing a mathematical framework to estimate and compare the accuracy – speed – power limits of several ADC architectures and variants. To gain system-level insight, time-interleaving is covered in detail, and a framework is also introduced to compare key metrics of interleaver architectures quantitatively. The impact of technology is also considered by adding process effects from several deep-scaled CMOS technologies. The validity of the introduced analytical approach and the feasibility of the proposed concepts are demonstrated by four silicon prototype Integrated Circuits (IC)s, realized in ultra-deep-scaled CMOS and FinFET technologies. Introduces a new, holistic approach for the analysis and design of high-performance ADCs in deep-scaled CMOS technologies, from theoretical concepts to silicon bring-up and verification; Describes novel methods and techniques to push the accuracy – speed – power boundaries of multi-GHz ADCs, analyzing core and peripheral circuits’ trade-offs across the entire ADC chain; Supports the introduced analysis and design concepts by four state-of-the-art silicon prototype ICs, implemented in 28nm bulk CMOS and 16nm FinFET technologies; Provides a useful reference and a valuable tool for beginners as well as experienced ADC design engineers.
| Author | : Yan Lu |
| Publisher | : CRC Press |
| Total Pages | : 187 |
| Release | : 2022-09-01 |
| Genre | : Science |
| ISBN | : 1000796191 |
Driven by advanced CMOS technology, power management units, RF transceivers, and sensors, analog and mixed-signal circuits can now be fully integrated with VLSI digital systems for applications ranging from mobile, internet-of-things (IoT), wearable, and implantable medical devices. Evidently, the circuit- and system-level innovations have pushed the device performance boundaries to become orders of magnitude higher, whilst keeping the same or even lower power consumption.Selected Topic in Power, RF, and Mixed-Signal ICs provides a practical overview and state-of-the-art advancements on several selected topics in the areas of power, RF, and mixed-signal integrated circuits and systems.Topics covered in the book include:• Very-High-Frequency DC-DC Switching Converters• Analog and Digital Low-Dropout Regulators• Analog and Digital Sub-Sampling Frequency Synthesizers• Hybrid ADC Architecture with Digital Assisted Techniques• CMOS Image Sensors and Their Biomedical Applications• CMOS Temperature Sensors• CMOS Millimeter-Wave Power Amplifiers• Zigbee/BLE Transmitter for IoT Applications
| Author | : Weitao Li |
| Publisher | : Springer |
| Total Pages | : 181 |
| Release | : 2017-08-01 |
| Genre | : Technology & Engineering |
| ISBN | : 3319620126 |
This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
| Author | : Simon Louwsma |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 148 |
| Release | : 2010-09-08 |
| Genre | : Technology & Engineering |
| ISBN | : 9048197163 |
Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.
