Design Of A Wideband Quadrature Continuous Time Delta Sigma Adc Microform
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Author | : Navid Yaghini |
Publisher | : Library and Archives Canada = Bibliothèque et Archives Canada |
Total Pages | : 168 |
Release | : 2004 |
Genre | : |
ISBN | : 9780612953758 |
Delta-sigma (DeltaSigma) modulation is a popular technique for making high resolution analog to digital and digital to analog converters (ADC and DAC). This thesis outlines a design procedure for a low power, wide bandwidth, 4th order continuous-time complex bandpass DeltaSigma ADC. System level simulations of the modulator are used to examine the behavior of the modulator in presence of moderate circuit imperfections. The modulator was designed and fabricated in TSMC's 0.18mum CMOS technology. The ADC achieves 68.8dB SNDR in a 23MHz signal bandwidth while consuming 42.6mW from a 1.8V supply. The core area of the IC is 0.95mm2. This work demonstrates the feasibility of implementing a high-resolution high-speed DeltaSigma ADC suitable for a low-IF receiver in deep sub-micron technology using low-gain opamps.
Author | : Fang Chen |
Publisher | : |
Total Pages | : 258 |
Release | : 2008 |
Genre | : |
ISBN | : |
Author | : James A. Cherry |
Publisher | : Springer Science & Business Media |
Total Pages | : 272 |
Release | : 2006-04-18 |
Genre | : Technology & Engineering |
ISBN | : 0306470527 |
Among analog-to-digital converters, the delta-sigma modulator has cornered the market on high to very high resolution converters at moderate speeds, with typical applications such as digital audio and instrumentation. Interest has recently increased in delta-sigma circuits built with a continuous-time loop filter rather than the more common switched-capacitor approach. Continuous-time delta-sigma modulators offer less noisy virtual ground nodes at the input, inherent protection against signal aliasing, and the potential to use a physical rather than an electrical integrator in the first stage for novel applications like accelerometers and magnetic flux sensors. More significantly, they relax settling time restrictions so that modulator clock rates can be raised. This opens the possibility of wideband (1 MHz or more) converters, possibly for use in radio applications at an intermediate frequency so that one or more stages of mixing might be done in the digital domain. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits covers all aspects of continuous-time delta-sigma modulator design, with particular emphasis on design for high clock speeds. The authors explain the ideal design of such modulators in terms of the well-understood discrete-time modulator design problem and provide design examples in Matlab. They also cover commonly-encountered non-idealities in continuous-time modulators and how they degrade performance, plus a wealth of material on the main problems (feedback path delays, clock jitter, and quantizer metastability) in very high-speed designs and how to avoid them. They also give a concrete design procedure for a real high-speed circuit which illustrates the tradeoffs in the selection of key parameters. Detailed circuit diagrams, simulation results and test results for an integrated continuous-time 4 GHz band-pass modulator for A/D conversion of 1 GHz analog signals are also presented. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits concludes with some promising modulator architectures and a list of the challenges that remain in this exciting field.
Author | : Shanthi Pavan |
Publisher | : John Wiley & Sons |
Total Pages | : 583 |
Release | : 2016-12-15 |
Genre | : Technology & Engineering |
ISBN | : 1119258286 |
This new edition introduces operation and design techniques for Sigma-Delta converters in physical and conceptual terms, and includes chapters which explore developments in the field over the last decade Includes information on MASH architectures, digital-to-analog converter (DAC) mismatch and mismatch shaping Investigates new topics including continuous-time ΔΣ analog-to-digital converters (ADCs) principles and designs, circuit design for both continuous-time and discrete-time ΔΣ ADCs, decimation and interpolation filters, and incremental ADCs Provides emphasis on practical design issues for industry professionals
Author | : Lucien Breems |
Publisher | : Springer Science & Business Media |
Total Pages | : 174 |
Release | : 2001-08-31 |
Genre | : Technology & Engineering |
ISBN | : 0792374924 |
This text describes the design and theory of continuous-time sigma-delta modulators for analogue-to-digital conversion in radio receivers. The book's main focus is on dynamic range, linearity and power efficiency aspects of sigma-delta modulators, which are very important requirements for use in battery operated receivers.
Author | : Muhammed Bolatkale |
Publisher | : Springer |
Total Pages | : 135 |
Release | : 2014-05-27 |
Genre | : Technology & Engineering |
ISBN | : 3319058401 |
This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nano meter-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.
Author | : Aytac Atac |
Publisher | : |
Total Pages | : |
Release | : 2016 |
Genre | : |
ISBN | : |
Author | : Friedel Gerfers |
Publisher | : Springer Science & Business Media |
Total Pages | : 257 |
Release | : 2006-02-27 |
Genre | : Technology & Engineering |
ISBN | : 3540284737 |
Sigma-delta A/D converters are a key building block in wireless and multimedia applications. This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators. The results of several years of research by the authors in the field of CT sigma-delta modulators are covered, including the analysis and modeling of different CT modulator architectures, CT/DT loop filter synthesis, a detailed error analysis of all components, and possible compensation/correction schemes for the non-ideal behavior in CT sigma-delta modulators. Guidance for obtaining low-power consumption and several practical implementations are also presented. It is shown that all the proposed new theories, architectures and possible correction techniques have been confirmed by measurements on discrete or integrated circuits. Quantitative results are also provided, thus enabling prediction of the resulting accuracy.
Author | : Qiyuan Liu |
Publisher | : Springer |
Total Pages | : 215 |
Release | : 2018-03-27 |
Genre | : Technology & Engineering |
ISBN | : 3319772252 |
This book describes a circuit architecture for converting real analog signals into a digital format, suitable for digital signal processors. This architecture, referred to as multi-stage noise-shaping (MASH) Continuous-Time Sigma-Delta Modulators (CT-ΔΣM), has the potential to provide better digital data quality and achieve better data rate conversion with lower power consumption. The authors not only cover MASH continuous-time sigma delta modulator fundamentals, but also provide a literature review that will allow students, professors, and professionals to catch up on the latest developments in related technology.
Author | : Yan Wang |
Publisher | : |
Total Pages | : 338 |
Release | : 2010 |
Genre | : Analog-to-digital converters |
ISBN | : |
Delta-Sigma analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations of a [Delta-Sigma] modulator. One is based on the discrete-time (DT) switched-capacitor (SC) circuitry and the other employs continuous-time (CT) circuitry. Compared to a CT structure, the DT [Delta-Sigma] ADC is easier to analyze and design, is more robust to process variations and jitter noise, and is more flexible in the multi-mode applications. On the other hand, the CT [Delta-Sigma] ADC does not suffer from the strict settling accuracy requirement for the loop filter and thus can achieve lower power dissipation and higher sampling frequency than its DT counterpart. In this thesis, both DT and CT [Delta-Sigma] ADCs are investigated. Several design innovations, in both system-level and circuit-level, are proposed to achieve lower power consumption and wider signal bandwidth. For DT [Delta-Sigma] ADCs, a new dynamic-biasing scheme is proposed to reduce opamp bias current and the associated signal-dependent harmonic distortion is minimized by using the low-distortion architecture. The technique was verified in a 2.5MHz BW and 13bit dynamic range DT [Delta-Sigma] ADC. In addition, a second-order noise coupling technique is presented to save two integrators for the loop filter, and to achieve low power dissipation. Also, a direct-charge-transfer (DCT) technique is suggested to reduce the speed requirements of the adder, which is also preferable in wideband low-power applications. For CT [Delta-Sigma] ADCs, a wideband low power CT 2-2 MASH has been designed. High linearity performance was achieved by using a modified low-distortion technique, and the modulator achieves higher noise-shaping ability than the single stage structure due to the inter-stage gain. Also, the quantization noise leakage due to analog circuit non-idealities can be adaptively compensated by a designed digital calibration filter. Using a 90nm process, simulation of the modulator predicts a 12bit resolution within 20MHz BW and consumes only 25mW for analog circuitry. In addition, the noise-coupling technique is investigated and proposed for the design of CT [Delta-Sigma] ADCs and it is promising to achieve low power dissipation for wideband applications. Finally, the application of noise-coupling technique is extended and introduced to high-accuracy incremental data converters. Low power dissipation can be expected.