This book covers algorithmic aspects of computer aided circuit design for VLSI of large circuits. The large scale aspect of VLSI requires a reorientation towards new and more efficient techniques. Many algorithms have survived the test of time, while others are suffering from the usual problem of polynominal or exponential running time complexity and storage requirements. The approaches presented in this book are techniques which were developed in response to the VLSI problems. The most recent ``exact'' circuit analysis and simulation techniques are presented, such as waveform relaxation and timing simulation. The book concentrates on the analysis and simulation of large circuits which exceed the capabilities of general purpose analyzers in both compute time and storage. Also discussed are circuit models for switch level simulation, techniques and circuit models for interconnections, capacitance and inductances and optimization techniques. The language and notation have been kept uniform throughout the book to help the reader to maintain the continuity between the topics discussed in the different chapters. All algorithms are written in a Pascal style. The terminology used should reflect the emerging language used in most of the VLSI circuit design community. The book includes proven approaches as well as techniques which are presently in a research state.