A Study on High-K Dielectrics for Discrete Charge-Trapping Flash Memory Applications

A Study on High-K Dielectrics for Discrete Charge-Trapping Flash Memory Applications
Author: Dr Xiaodong Huang
Publisher: Open Dissertation Press
Total Pages:
Release: 2017-01-26
Genre:
ISBN: 9781361315682

This dissertation, "A Study on High-k Dielectrics for Discrete Charge-trapping Flash Memory Applications" by Xiaodong, Huang, 黄晓东, was obtained from The University of Hong Kong (Pokfulam, Hong Kong) and is being sold pursuant to Creative Commons: Attribution 3.0 Hong Kong License. The content of this dissertation has not been altered in any way. We have altered the formatting in order to facilitate the ease of printing and reading of the dissertation. All rights not granted by the above license are retained by the author. Abstract: Discrete charge-trapping flash memories are more promising than their floating-gate counterparts due to their physically discrete-trapping and coupling-free nature. Si3N4 is conventional material as charge-trapping layer (CTL) for charge storage. The shortcomings of Si3N4 are its low dielectric constant and small barrier height at its interface with SiO2 tunneling layer. Therefore, this research aims to investigate new materials as CTL for improving the performance of the memory devices. The charge-trapping characteristics of La2O3 with and without nitrogen incorporation were investigated. Compared with the memory device with La2O3 as CTL, the one with nitrided La2O3 (LaON) showed larger memory window, higher program/erase (P/E) speeds and smaller charge loss, due to the nitrided La2O3 film exhibiting less crystallized structure, higher trap density induced by nitrogen incorporation, and suppressed leakage by nitrogen passivation. In order to further improve the performance of the memory device with LaON CTL, a device with band-engineered LaTiON/LaON structure as CTL was also explored, and demonstrated to have better performance than the one with LaON CTL. This was ascribed to the variable tunneling path of charge carriers under P/E and retention modes (realized by the band-engineered charge-trapping layer), high trap density of LaTiON, and large barrier height at the LaTiON/SiO interface. SrTiO 3and BaTiO3, both ofwhich are typical perovskite-type dielectrics, also possess distinguished characteristics as CTL, including remarkably high dielectric constant and large conduction-band offset relative to SiO2. The charge-trapping properties of SrTiO3 with and without fluorine incorporation were studied. The device with fluorinated SrTiO3 film showed promising performance in terms of higher P/E speeds at a low gate voltage, better endurance and data retention compared with that without fluorine treatment. These advantages were associated with generated deep-level traps, reduced leakage path, and enhanced strength of the film due to the highest electro-negativity of the fluorine atoms incorporated in the film. The charge-trapping properties of BaTiO3 with and without Zr incorporation were also investigated, where Zr incorporated in BaTiO3 could strengthen the dielectric film and improve its thermodynamic stability. The device with Zr incorporation exhibited similar memory window as the one without Zr incorporation, but higher program speed at low gate voltage, better endurance and data retention, due to the Zr-doped BaTiO3 exhibiting higher charge-trapping efficiency and higher density of traps with deeper energy levels. Besides nitride-based memories, nanocrystal-based memories are another type of charge-trapping memories, where nanocrystals (NCs) embedded into a dielectric are used for charge storage. Memory devices with Ga2O3 NCs as CTL were investigated, which are compatible with the CMOS process. The Ga2O3 NCs displayed higher trap density than the Ga2O3 dielectric film. Moreover, compared with the device with Ga2O 3NCs as CTL, the one with nitrided Ga2O3 NCs showed larger memory window, higher operating speed and better data retention, mainly due to higher charge-trapping efficiency of the nitrided Ga2O3 NCs and nitrogen-induced suppressed formation of interlayer at the Ga2O/SiO interface. DOI: 10.5353/th_b5043438 Subjects: Dielectrics Fla

Charge-Trapping Non-Volatile Memories

Charge-Trapping Non-Volatile Memories
Author: Panagiotis Dimitrakis
Publisher: Springer
Total Pages: 219
Release: 2015-08-05
Genre: Technology & Engineering
ISBN: 3319152904

This book describes the basic technologies and operation principles of charge-trapping non-volatile memories. The authors explain the device physics of each device architecture and provide a concrete description of the materials involved as well as the fundamental properties of the technology. Modern material properties used as charge-trapping layers, for new applications are introduced.

Charge-Trapping Non-Volatile Memories

Charge-Trapping Non-Volatile Memories
Author: Panagiotis Dimitrakis
Publisher: Springer
Total Pages: 215
Release: 2017-02-14
Genre: Technology & Engineering
ISBN: 3319487051

This book describes the technology of charge-trapping non-volatile memories and their uses. The authors explain the device physics of each device architecture and provide a concrete description of the materials involved and the fundamental properties of the technology. Modern material properties, used as charge-trapping layers, for new applications are introduced. Provides a comprehensive overview of the technology for charge-trapping non-volatile memories; Details new architectures and current modeling concepts for non-volatile memory devices; Focuses on conduction through multi-layer gate dielectrics stacks.

Nanomaterials-Based Charge Trapping Memory Devices

Nanomaterials-Based Charge Trapping Memory Devices
Author: Ammar Nayfeh
Publisher: Elsevier
Total Pages: 192
Release: 2020-05-27
Genre: Science
ISBN: 012822343X

Rising consumer demand for low power consumption electronics has generated a need for scalable and reliable memory devices with low power consumption. At present, scaling memory devices and lowering their power consumption is becoming more difficult due to unresolved challenges, such as short channel effect, Drain Induced Barrier Lowering (DIBL), and sub-surface punch-through effect, all of which cause high leakage currents. As a result, the introduction of different memory architectures or materials is crucial. Nanomaterials-based Charge Trapping Memory Devices provides a detailed explanation of memory device operation and an in-depth analysis of the requirements of future scalable and low powered memory devices in terms of new materials properties. The book presents techniques to fabricate nanomaterials with the desired properties. Finally, the book highlights the effect of incorporating such nanomaterials in memory devices. This book is an important reference for materials scientists and engineers, who are looking to develop low-powered solutions to meet the growing demand for consumer electronic products and devices. Explores in depth memory device operation, requirements and challenges Presents fabrication methods and characterization results of new nanomaterials using techniques, including laser ablation of nanoparticles, ALD growth of nano-islands, and agglomeration-based technique of nanoparticles Demonstrates how nanomaterials affect the performance of memory devices