A Study on High-K Dielectrics for Discrete Charge-Trapping Flash Memory Applications

A Study on High-K Dielectrics for Discrete Charge-Trapping Flash Memory Applications
Author: Dr Xiaodong Huang
Publisher: Open Dissertation Press
Total Pages:
Release: 2017-01-26
Genre:
ISBN: 9781361315682

This dissertation, "A Study on High-k Dielectrics for Discrete Charge-trapping Flash Memory Applications" by Xiaodong, Huang, 黄晓东, was obtained from The University of Hong Kong (Pokfulam, Hong Kong) and is being sold pursuant to Creative Commons: Attribution 3.0 Hong Kong License. The content of this dissertation has not been altered in any way. We have altered the formatting in order to facilitate the ease of printing and reading of the dissertation. All rights not granted by the above license are retained by the author. Abstract: Discrete charge-trapping flash memories are more promising than their floating-gate counterparts due to their physically discrete-trapping and coupling-free nature. Si3N4 is conventional material as charge-trapping layer (CTL) for charge storage. The shortcomings of Si3N4 are its low dielectric constant and small barrier height at its interface with SiO2 tunneling layer. Therefore, this research aims to investigate new materials as CTL for improving the performance of the memory devices. The charge-trapping characteristics of La2O3 with and without nitrogen incorporation were investigated. Compared with the memory device with La2O3 as CTL, the one with nitrided La2O3 (LaON) showed larger memory window, higher program/erase (P/E) speeds and smaller charge loss, due to the nitrided La2O3 film exhibiting less crystallized structure, higher trap density induced by nitrogen incorporation, and suppressed leakage by nitrogen passivation. In order to further improve the performance of the memory device with LaON CTL, a device with band-engineered LaTiON/LaON structure as CTL was also explored, and demonstrated to have better performance than the one with LaON CTL. This was ascribed to the variable tunneling path of charge carriers under P/E and retention modes (realized by the band-engineered charge-trapping layer), high trap density of LaTiON, and large barrier height at the LaTiON/SiO interface. SrTiO 3and BaTiO3, both ofwhich are typical perovskite-type dielectrics, also possess distinguished characteristics as CTL, including remarkably high dielectric constant and large conduction-band offset relative to SiO2. The charge-trapping properties of SrTiO3 with and without fluorine incorporation were studied. The device with fluorinated SrTiO3 film showed promising performance in terms of higher P/E speeds at a low gate voltage, better endurance and data retention compared with that without fluorine treatment. These advantages were associated with generated deep-level traps, reduced leakage path, and enhanced strength of the film due to the highest electro-negativity of the fluorine atoms incorporated in the film. The charge-trapping properties of BaTiO3 with and without Zr incorporation were also investigated, where Zr incorporated in BaTiO3 could strengthen the dielectric film and improve its thermodynamic stability. The device with Zr incorporation exhibited similar memory window as the one without Zr incorporation, but higher program speed at low gate voltage, better endurance and data retention, due to the Zr-doped BaTiO3 exhibiting higher charge-trapping efficiency and higher density of traps with deeper energy levels. Besides nitride-based memories, nanocrystal-based memories are another type of charge-trapping memories, where nanocrystals (NCs) embedded into a dielectric are used for charge storage. Memory devices with Ga2O3 NCs as CTL were investigated, which are compatible with the CMOS process. The Ga2O3 NCs displayed higher trap density than the Ga2O3 dielectric film. Moreover, compared with the device with Ga2O 3NCs as CTL, the one with nitrided Ga2O3 NCs showed larger memory window, higher operating speed and better data retention, mainly due to higher charge-trapping efficiency of the nitrided Ga2O3 NCs and nitrogen-induced suppressed formation of interlayer at the Ga2O/SiO interface. DOI: 10.5353/th_b5043438 Subjects: Dielectrics Fla

A Study on the Dielectrics of Charge-Trapping Flash Memory Devices

A Study on the Dielectrics of Charge-Trapping Flash Memory Devices
Author: Qingbo Tao
Publisher:
Total Pages:
Release: 2017-01-26
Genre:
ISBN: 9781361335383

This dissertation, "A Study on the Dielectrics of Charge-trapping Flash Memory Devices" by Qingbo, Tao, 陶庆波, was obtained from The University of Hong Kong (Pokfulam, Hong Kong) and is being sold pursuant to Creative Commons: Attribution 3.0 Hong Kong License. The content of this dissertation has not been altered in any way. We have altered the formatting in order to facilitate the ease of printing and reading of the dissertation. All rights not granted by the above license are retained by the author. Abstract: Discrete charge-trapping flash memory is being developed for the next-generation commercial flash-memory applications due to its advantages over the traditional floating-gate counterpart. Currently, Si3N4 is widely used as charge-trapping layer (CTL). However, Si3N4 has low dielectric constant and small conduction-band offset with respect to the SiO2 tunneling layer, imposing limitation on further applications. Therefore, this research emphasized on investigating new dielectrics with appropriate fabrication methods to replace Si3N4 as CTL for achieving improved memory performance. Firstly, GeON CTL annealed at different temperatures was investigated. The memory device with post-deposition annealing at 600 0C exhibited the largest memory window, the best charge retention performance, and the highest reliability. These good results are due to the fact that optimal annealing temperature could suppress shallow traps and also produce new traps with desirable energy levels in the CTL. Since ZnON has a negative conduction-band offset (NCBO) with respect to Si, the traps located in the bandgap of ZnON should have deep energy levels. The memory performances of ZrON film with and without Zn doping were studied. Experimental results showed that ZrZnON film had higher program speed and better charge retention performance due to many deeper trap levels induced by the Zn doping, as well as higher erase speed due to the direct recombination of electrons at these deeper trap levels with incoming holes and the intermediary role of these deeper trap levels under erase mode. MoO3 is another NCBO dielectric with a high K value and many oxygen vacancies. La2O3, a rare-earth metal oxide, is a promising dielectric as CTL. To combine the advantages of both La2O3 and MoO3, Mo-doped La2O3 was proposed as a new CTL. Compared to the device with pure La2O3, the one with LaMoO film as CTL had significantly larger C-V hysteresis window, much higher P/E speeds, and better charge retention due to the deeper-level traps and deeper quantum wells created by the LaMoO film. Nitrogen incorporation is a popular approach to increase the trap density in the bulk of CTL. In this research, the memory performances of GdTiO films with and without nitrogen incorporation were compared. Since the nitrogen incorporation induced smaller equivalent oxide thickness, produced nitride-related traps with desirable energy level and larger cross-section for charge capture, the GdTiON film possessed better memory performance than the GdTiO film. Finally, fluorine plasma was employed to improve the quality of blocking layer. The memory device with AlOF blocking layer obtained higher program speed, better reliability and better charge retention than that based on AlO blocking layer. The improved performance was due to the fact that the fluorine incorporation passivated the defects and removed the excess oxygen in the bulk of the blocking layer. In summary, dielectric plays important roles in the performance of charge-trapping flash memory. Memory devices with GeON, ZrZnON, LaMoO, or GdTiON as charge trapping layer and AlOF as blocking layer can produce large memory window, high program/erase speed and good charge retention. DOI: 10.5353/th_b5177320 Subjects: Flash memories (Computers) Dielectrics

Nanomaterials-Based Charge Trapping Memory Devices

Nanomaterials-Based Charge Trapping Memory Devices
Author: Ammar Nayfeh
Publisher: Elsevier
Total Pages: 192
Release: 2020-05-27
Genre: Science
ISBN: 012822343X

Rising consumer demand for low power consumption electronics has generated a need for scalable and reliable memory devices with low power consumption. At present, scaling memory devices and lowering their power consumption is becoming more difficult due to unresolved challenges, such as short channel effect, Drain Induced Barrier Lowering (DIBL), and sub-surface punch-through effect, all of which cause high leakage currents. As a result, the introduction of different memory architectures or materials is crucial. Nanomaterials-based Charge Trapping Memory Devices provides a detailed explanation of memory device operation and an in-depth analysis of the requirements of future scalable and low powered memory devices in terms of new materials properties. The book presents techniques to fabricate nanomaterials with the desired properties. Finally, the book highlights the effect of incorporating such nanomaterials in memory devices. This book is an important reference for materials scientists and engineers, who are looking to develop low-powered solutions to meet the growing demand for consumer electronic products and devices. Explores in depth memory device operation, requirements and challenges Presents fabrication methods and characterization results of new nanomaterials using techniques, including laser ablation of nanoparticles, ALD growth of nano-islands, and agglomeration-based technique of nanoparticles Demonstrates how nanomaterials affect the performance of memory devices

Metal Oxides for Non-volatile Memory

Metal Oxides for Non-volatile Memory
Author: Panagiotis Dimitrakis
Publisher: Elsevier
Total Pages: 534
Release: 2022-03-01
Genre: Technology & Engineering
ISBN: 0128146303

Metal Oxides for Non-volatile Memory: Materials, Technology and Applications covers the technology and applications of metal oxides (MOx) in non-volatile memory (NVM) technology. The book addresses all types of NVMs, including floating-gate memories, 3-D memories, charge-trapping memories, quantum-dot memories, resistance switching memories and memristors, Mott memories and transparent memories. Applications of MOx in DRAM technology where they play a crucial role to the DRAM evolution are also addressed. The book offers a broad scope, encompassing discussions of materials properties, deposition methods, design and fabrication, and circuit and system level applications of metal oxides to non-volatile memory. Finally, the book addresses one of the most promising materials that may lead to a solution to the challenges in chip size and capacity for memory technologies, particular for mobile applications and embedded systems. Systematically covers metal oxides materials and their properties with memory technology applications, including floating-gate memory, 3-D memory, memristors, and much more Provides an overview on the most relevant deposition methods, including sputtering, CVD, ALD and MBE Discusses the design and fabrication of metal oxides for wide breadth of non-volatile memory applications from 3-D flash technology, transparent memory and DRAM technology

Defects in HIgh-k Gate Dielectric Stacks

Defects in HIgh-k Gate Dielectric Stacks
Author: Evgeni Gusev
Publisher: Springer Science & Business Media
Total Pages: 495
Release: 2006-02-15
Genre: Technology & Engineering
ISBN: 1402043678

The goal of this NATO Advanced Research Workshop (ARW) entitled “Defects in Advanced High-k Dielectric Nano-electronic Semiconductor Devices”, which was held in St. Petersburg, Russia, from July 11 to 14, 2005, was to examine the very complex scientific issues that pertain to the use of advanced high dielectric constant (high-k) materials in next generation semiconductor devices. The special feature of this workshop was focus on an important issue of defects in this novel class of materials. One of the key obstacles to high-k integration into Si nano-technology are the electronic defects in high-k materials. It has been established that defects do exist in high-k dielectrics and they play an important role in device operation. However, very little is known about the nature of the defects or about possible techniques to eliminate, or at least minimize them. Given the absence of a feasible alternative in the near future, well-focused scientific research and aggressive development programs on high-k gate dielectrics and related devices must continue for semiconductor electronics to remain a competitive income producing force in the global market.

Charge-Trapping Non-Volatile Memories

Charge-Trapping Non-Volatile Memories
Author: Panagiotis Dimitrakis
Publisher: Springer
Total Pages: 215
Release: 2017-02-14
Genre: Technology & Engineering
ISBN: 3319487051

This book describes the technology of charge-trapping non-volatile memories and their uses. The authors explain the device physics of each device architecture and provide a concrete description of the materials involved and the fundamental properties of the technology. Modern material properties, used as charge-trapping layers, for new applications are introduced. Provides a comprehensive overview of the technology for charge-trapping non-volatile memories; Details new architectures and current modeling concepts for non-volatile memory devices; Focuses on conduction through multi-layer gate dielectrics stacks.