A design is presented for a Content Addressable Array Parallel Processor (CAAPP) which is both practical and feasible. Its practicality stems from an extensive program of research into real applications of content addressability and parallelism. The feasibility of the design stems from development under a set of conservative engineering constraints tied to limitations of VLSI technology. The authors then describe the implementation of two procedures for image processing on the CAAPP. The first performs image convolutions very quickly. It is shown that this algorithm can be generalized to perform convolutions with increased mask size with only a moderate reduction in speed. The second uses the CAAPP to quickly and robustly decompose an optic flow field into its rotational and translational components to recover sensor motion parameters. It is important to note that this latter is made possible only by the combination of associativity and array processing that our design provides. (Author).